1. Field of the Invention
This invention relates to a Josephson junction circuit. In particular, it relates to superconducting analog-to-digital circuitry for extremely low level signals.
2. Description of the Related Art
Josephson junctions are, of course, well known in the art. U.S. Pat. Nos. 4,432,134 issued Feb. 21, 1984, to Jones et al.; 4,242,419 issued Dec. 30, 1980, to Dayem et al.; 4,202,959 issued Sept. 2, 1980, to and, 3,816,845 issued June 11, 1974, to Cuomo et al., give examples of Josephson junction configurations and processes for making them.
Circuitry using Josephson junctions for analog-to-digital conversion is shown in U.S. Pat. No.4,646,060 issued 2/24/87 to Phillips et al, U.S. Pat. No. 4,315,255 issued 2/9/82 to Harris and Hamilton, and U.S. Pat. No. 4,672,359 issued 6/9/87 to Silver. Harris and Hamilton teaches the use of mutual inductances in 1:2:4:8:16:32 ratio feeding parallel superconducting interferometers in their conversion. Both Phillips et al and Silver are level tracking circuits which use a balanced dc quantitizer SQUID (superconducting quantum interference device) with a small bias current (less than 90 percent of the sum of the critical currents) to the pair of Josephson junctions to operate the SQUID in a bi-stable mode, with a quantum change in input flux giving a voltage output pulse. Silver feeds his SQUID with a composite signal including the analog signal, a high frequency dither signal, and a correction signal which maintains the SQUID at a constant operating point. Phillips et al note that in their circuit, positive incremental changes in the analog signal result in the generation of voltage pulses across a first Josephson junction, and negative incremental changes in the analog signal result in the generation of voltage pulses of the same polarity across a second Josephson junction, and that means is included for counting algebraically the voltage pulses across the first and second junctions to determine the corresponding digital value of the changes in the analog signal circuit.
The operating parameters of DC SQUID's and a SQUID amplifier are described in U.S. Pat. No. 4,496,854 issued to Chi et al on 1/29/85. Also described are the details of shunting junctions to make them nonhysteretic, and the high frequency oscillations in junction voltage caused by junction currents greater than the critical current of the junction.
The DC SQUID is described in some detail in an article in the IEEE Trans. on Magnetics, Vol MAG-17, No. 1, January 1981, pp 387-94, by Ketchen. In a paper entitled "A Josephson Counter-Circuit with Two-Phase Power Supply" by Nakagawa et al. (Abstracts of the 17th Conference on Solid State Devices and Materials, Tokyo, 1985, pp. 123-126), a Josephson digital circuit is described which utilizes Josephson junctions to provide a data-latch function for a counter-circuit. A paper entitled "100 GHz Binary Counter Based on DC SQUID", by Hamilton and Lloyd, IEEE Electron Device Letters, Vol. EDL-3, No. 11, pp 335-38, November 1982, describes the Josephson junction integrating counter circuit. The Hamilton et al circuit is the preferred counter for use in the instant invention.